el2c00009_si_001.pdf (528 kB)
Download fileSynergic Impacts of CF4 Plasma Treatment and Post-thermal Annealing on the Nonvolatile Memory Performance of Charge-Trap-Assisted Memory Thin-Film Transistors Using Al–HfO2 Charge Trap and In–Ga–Zn–O Active Channel Layers
journal contribution
posted on 2022-03-07, 12:03 authored by Jin-Ju Kim, Sung-Min YoonCharge-trap-assisted memory thin-film
transistors (CTM-TFTs) using
the engineered Al-doped HfO2 (Al:HfO2) CTL and
In–Ga–Zn–O channel were fabricated and characterized
to investigate the effects of CTL engineering processes including
Al doping, CF4 plasma treatment, and thermal annealing
on nonvolatile memory performances. The CTM-TFTs using the Al:HfO2 CTL treated with CF4 plasma and postannealing
(A4) exhibited a wider memory window of 13.0 V with a gate voltage
sweep range of ±20 V and a higher program/erase (P/E) ratio of
8.0 × 104 even with 1-μs-long P/E pulses. On
the contrary, smaller memory windows were obtained to be 2.0, 3.5,
and 4.5 V for the devices using the nontreated (A1), only CF4 plasma-treated (A2), and only thermally annealed Al:HfO2 CTLs (A3), respectively. Furthermore, for the A4 CTM-TFT device,
the stable operational reliabilities including a long-term retention
after a lapse of time for 104 s and a robust data endurance
after repeated P/E cycles of 104 were obtained without
any degradation of the P/E ratio. The improvement in memory device
(A4) characteristics can be suggested to originate from the remarkable
increase in the density of stable charge-trap sites located within
the CTL and the effective suppression of undesirable trapping events
in interfaces thanks to the optimum implementation of CTL engineering
processes.
History
Usage metrics
Categories
Keywords
undesirable trapping eventsrobust data endurancewider memory windowsmaller memory windowsnonvolatile memory performancesnonvolatile memory performanceassisted memory thin± 20 va3 ), respectivelythermally annealed alctl engineering processes4 sub4 sup2 sub0 × 10memory devicea2 ),a1 ),0 vthermal annealingtft deviceterm retentionsynergic impactsremarkable increaseoptimum implementationinterfaces thankshigher programfilm transistorsengineered aleffective suppression