am5b07140_si_001.pdf (2.76 MB)
Interface Passivation and Trap Reduction via a Solution-Based Method for Near-Zero Hysteresis Nanowire Field-Effect Transistors
journal contribution
posted on 2015-10-14, 00:00 authored by Marios Constantinou, Vlad Stolojan, Kiron Prabha Rajeev, Steven Hinder, Brett Fisher, Timothy
D. Bogart, Brian
A. Korgel, Maxim ShkunovIn
this letter, we demonstrate a solution-based method for a one-step
deposition and surface passivation of the as-grown silicon nanowires
(Si NWs). Using N,N-dimethylformamide
(DMF) as a mild oxidizing agent, the NWs’ surface traps density
was reduced by over 2 orders of magnitude from 1 × 1013 cm–2 in pristine NWs to 3.7 × 1010 cm–2 in DMF-treated NWs, leading to a dramatic
hysteresis reduction in NW field-effect transistors (FETs) from up
to 32 V to a near-zero hysteresis. The change of the polyphenylsilane
NW shell stoichiometric composition was confirmed by X-ray photoelectron
spectroscopy analysis showing a 35% increase in fully oxidized Si4+ species for DMF-treated NWs compared to dry NW powder. Additionally,
a shell oxidation effect induced by DMF resulted is a more stable
NW FET performance with steady transistor currents and only 1.5 V
hysteresis after 1000 h of air exposure.